1. Field of the Invention
The present invention relates to a semiconductor device having a ferroelectric capacitor structure in which a dielectric film comprising a ferroelectric material is sandwiched between a bottom electrode and a top electrode, and to a method of fabricating the same.
2. Description of the Related Art
Flash memories and ferroelectric random access memories (FeRAMs) are conventionally well-known non-volatile memories that can store information without supplying a power.
The flash memory has a floating gate buried in the gate insulating film of an insulated-gate field-effect transistor (IGFET) and stores information as charge on the floating gate. Since the flash memory uses the tunnel current passing through the insulating film to write and erase information, it requires a relatively high voltage.
The FeRAM utilizes ferroelectric hysteresis characteristics to store information. In a ferroelectric capacitor structure having a ferroelectric film as dielectric material sandwiched between a pair of electrodes, the spontaneous polarization is generated according to a voltage applied between the pair of electrodes and preserved even after removing the applied voltage. The polarity of the spontaneous polarization can be inverted by inverting the polarity of the applied voltage, so if the spontaneous polarization can be detected, the information can be read. The FeRAM has advantages of a low voltage operation and a low power and high-speed writing operation as compared to the flash memory. The system on chip (SOC) used in IC cards and other applications is being developed by combining conventional logic technology with the FeRAM.
The related prior art is disclosed in, for example, Japanese Patent Application Laid-Open Nos. Hei 10-12730, Hei 9-237834, and Hei 2-151032.
Recently, semiconductor devices are integrated into smaller areas at higher densities. A problem with approaching a minimum design rule of 0.18 μm and below is that an interlayer insulating film such as a conventionally used silicon oxide film or the like cannot sufficiently fill in the space between adjacent interconnections, causing the occurrence of voids therebetween.
To improve the gap-fill characteristics of an interlayer insulating film, a high density plasma (HDP) CVD process is proposed, in which a high density silicon oxide film is formed as an interlayer insulating film. The term ‘high density’ in the term ‘high density plasma’ here means that a power equal to, or greater than, 1.5 kW is supplied from a low frequency power supply, for example, to an eight-inch wafer. The silicon oxide film formed by this HDP-CVD process can fill in even a narrow space between interconnections, thereby preventing the occurrence of voids.
Similar to other semiconductor devices, FeRAMs are also integrated into smaller areas at higher densities, and accordingly have the same problem as in the case described above. Therefore, a silicon oxide film formed by the HDP-CVD process (hereinafter, referred to as an HDP-CVD oxide film) may possibly be used as an interlayer insulating film for FeRAMs. In the case of FeRAMs, however, their situation is different because silane (SiH4) contained in a source gas is decomposed to generate hydrogen (H2), which is attracted toward the substrate by a low frequency bias voltage applied when such an HDP-CVD oxide film is formed. In the FeRAM, a dielectric film in the capacitor structure comprises a ferroelectric material including Pb(Zr1-xTix)O3, where 0≦x≦1, (called PZT) or (Sr1-xBax)Ta2O6, where 0≦x≦1, (called SBT), and such a dielectric film may be easily damaged by hydrogen attracted to the substrate (referred to below as a H2 attack), causing a serious problem in which the capacitor characteristics are severely degraded.
To solve this problem, a method is proposed in which first an HDP-CVD oxide film (a first HDP-CVD oxide film) is formed with a low bias voltage or un-bias and then another HDP-CVD oxide film (a second HDP-CVD oxide film) is formed with a bias voltage higher than the previous one. The first HDP-CVD oxide film has a function of trapping H2, so the H2 generated during the formation of the second HDP-CVD oxide film is trapped therein, thereby preventing the occurrence of the H2 attack.
When this two step HDP-CVD process is performed, however, the space between interconnections is partially filled with the first HDP-CVD oxide film and becomes narrower after the first HDP-CVD oxide film has been formed, and, in addition, the first HDP-CVD oxide film forms a so-called overhang shape at the corner regions of interconnections, so the gap-fill characteristics of the second HDP-CVD oxide film inevitably deteriorate. In this case, to improve the second HDP-CVD oxide film, the bias power must be set to be higher, but this causes the first HDP-CVD film hard to sufficiently trap the H2 and accordingly causes the H2 attack to easily occur. This implies that ensuring the gap-fill characteristics and preventing the H2 attack are in a so-called trade-off relationship. In FeRAMs, performance deteriorations by the H2 attack are a crucial issue, so the developments of technology are currently under way to solve this trade-off problem.